
PIC24F16KL402
FAMILY
DS3
1037B-page
37
20
11
M
ic
rochip
T
e
chnology
In
c.
TABLE 4-5:
INTERRUPT CONTROLLER REGISTER MAP
File
Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
INTCON1 0080 NSTDIS
—
MATHERR ADDRERR STKERR
OSCFAIL
—
0000
INTCON2 0082
ALTIVT
DISI
—
INT2EP
INT1EP
INT0EP
0000
IFS0
0084
NVMIF
—
AD1IF
U1TXIF
U1RXIF
—
T3IF
T2IF
CCP2IF
—
T1IF
CCP1IF
—INT0IF
0000
IFS1
0086 U2TXIF
U2RXIF
INT2IF
—
—
INT1IF
CNIF
CMIF
BCL1IF
SSP1IF
0000
IFS2
0088
—
—T3GIF
—
0000
IFS3
008A
—
—
0000
IFS4
008C
—
—HLVDIF
—
—U2ERIF
U1ERIF
—
0000
IFS5
008E
—
—ULPWUIF
0000
IEC0
0094
NVMIE
—
AD1IE
U1TXIE
U1RXIE
—
T3IE
T2IE
CCP2IE
—
T1IE
CCP1IE
—INT0IE
0000
IEC1
0096 U2TXIE U2RXIE
INT2IE
—
INT1IE
CNIE
CMIE
BCL1IE
SSP1IE
0000
IEC2
0098
—
—T3GIE
—
0000
IEC3
009A
—
—
0000
IEC4
009C
—
—HLVDIE
—
U2ERIE
U1ERIE
—
0000
IEC5
009E
—
—ULPWUIE
0000
IPC0
00A4
—
T1IP2
T1IP1
T1IP0
—
CCP1IP2
CCP1IP1
CCP1IP0
—
INT0IP2
INT0IP1
INT0IP0
4404
IPC1
00A6
—
T2IP2
T2IP1
T2IP0
—
CCP2IP2
CCP2IP1
CCP2IP0
—
4400
IPC2
00A8
—
U1RXIP2 U1RXIP1 U1RXIP0
—
T3IP2
T3IP1
T3IP0
4004
IPC3
00AA
—
NVMIP2
NVMIP1
NVMIP0
—
AD1IP2
AD1IP1
AD1IP0
—
U1TXIP2
U1TXIP1
U1TXIP0
4044
IPC4
00AC
—
CNIP2
CNIP1
CNIP0
—
CMIP2
CMIP1
CMIP0
—
BCL1IP2
BCL1IP1
BCL1IP0
—
SSP1IP2
SSP1IP1
SS1IP0
4444
IPC5
00AE
—
INT1IP2
INT1IP1
INT1IP0
0004
IPC6
00B0
—
—
4040
IPC7
00B2
—
U2TXIP2 U2TXIP1 U2TXIP0
—
U2RXIP2
U2RXIP1
U2RXIP0
—
INT2IP2
INT2IP1
INT2IP0
—
4440
IPC9
00B6
—
T3GIP2
T3GIP1
T3GIP0
—
0040
IPC12
00BC
—
—SSP2IP2(1) SSP2IP1(1) SSP2IP0(1) —
0440
IPC16
00C4
—
U2ERIP2
U2ERIP1
U2ERIP0
—
U1ERIP2
U1ERIP1
U1ERIP0
—
0440
IPC18
00C8
—
HLVDIP2
HLVDIP1
HLVDIP0
0004
IPC20
00CC
—
ULPWUIP2 ULPWUIP1 ULPWUIP0 0004
INTTREG 00E0 CPUIRQ
—VHOLD
—
ILR3
ILR2
ILR1
ILR0
—
VECNUM6 VECNUM5 VECNUM4 VECNUM3 VECNUM2 VECNUM1 VECNUM0
0000
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
These bits are unimplemented on PIC24FXXKL10X and PIC24FXXKL20X family devices; read as ‘0’.